This invention relates to a process for the fabrication of a semiconductor die.
Miniaturization and slimming of electrical and electronic equipment has led to a need for both thinner semiconductor devices and thinner semiconductor packaging. One way to produce a thinner semiconductor die is to remove excess material from the back side (inactive side) of the die. This is more easily done by removing excess material from the back side of the semiconductor wafer from which the individual dies are diced. The removal of the excess wafer typically occurs in a grinding process, commonly called back side grinding.
One way to produce smaller and more efficient semiconductor packages is to utilize a package having an array of metallic bumps attached to the active face of the package. The metallic bumps are disposed to match with bonding pads on a substrate. When the metal is reflowed to a melt, it connects with the bonding pads forming both electrical and mechanical connections. This metallic bump packaging is generally referred to as “flip chip” because the bumped semiconductors are flipped to be attached to their substrates.
A thermal mismatch exists between the semiconductor and the substrate, so that with repeated thermal cycling the metallic interconnections are stressed, potentially leading to failure. To counteract this, an encapsulating material, commonly called an underfill, is disposed in the gap surrounding the metallic bumps, between the semiconductor and the substrate.
Current trends in semiconductor packaging fabrication favor completing as many process steps as possible at the wafer level, allowing multiple integrated circuits to be processed at the same time, rather than individually, as occurs after die singulation. Unfortunately, underfill application does not lend itself well to wafer level processing, particularly when the wafer is thinned down in a grinding step, as handling becomes even more difficult due to the fragility of the thinned wafer.
Thus, there exists a need for a method of applying a wafer level underfill material to a thinned wafer that does not compromise the fragility of the wafer.